| Summary: | 碩士 === 國立臺北科技大學 === 電子工程系研究所 === 105 === The thesis proposes a buck converter and a boost converter. The proposed buck converter is a four-phase buck converter with optimum-damping controlled and dynamic-slope compensation techniques. The proposed four-phase buck converter has been fabricated in TSMC 0.18 μm CMOS 1P6M processes. The main topology of the proposed four-phase buck converter is based on the current-mode control with the optimum-damping controlled and dynamic-slope compensation techniques, so that the proposed four-phase buck converter can provide wide output voltage range from 0.5V to 1.8V. The proposed buck converter uses four-phase structure to raise output current up to 1500 mA. The experimental results show that transient response time is about 3 μs and 4 μs, when the load current is changed from 100 to 1500 mA and from 1500 to 100 mA, respectively. The peak power efficiency is 90.14% at 1000 mA load current.
The second converter is a boost converter with adaptive on-time (AOT) controlled and zero-current-detection techniques. The proposed boost converter has been fabricated in TSMC 0.18 μm CMOS 1P6M processes. The main topology of boost converter is based on dual-loop control with the zero-current-detection technique, so that the efficiency of the converter can be increased by 11% at the light load. The input voltage range is from 0.5V to 1V, the output voltage is 1.8V. The experimental results show that transient response time is about 2 μs and 3 μs, when the load current is changed from 5 to 300 mA and from 300 to 5 mA, respectively. The peak power efficiency is 91.6% at 200 mA load current.
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