| Summary: | 碩士 === 國立臺北科技大學 === 電子工程系研究所 === 105 === The first proposed converter of this thesis is a dead-beat controlled multi-phase buck converter. Its phase signal generator can achieve all phase signal and work in wide switching frequency. This configuration uses the dead-beat controlled technique to provide a wide output voltage range from 0.6 V to 2 V and an output current range from 0.5 A to 1 A. The proposed buck converter also has the characteristics of high stability and low output ripple. The proposed buck converter has been simulated with TSMC 0.18μm 3.3 V CMOS 1P6M technology, and the chip area is 1.2 mm 1.2 mm.
The second proposed converter of this thesis is an auto-reset voltage-regulated fly-back converter, which provides constant voltage of 5 V and constant current of 120 mA for the next stage circuit. This circuit uses the fly-back converter with split rectified output to achieve indoor AC to DC voltage function, and integrates the circuit of the power switch and the pulse width modulation (PWM) control to achieve high input voltage and provide stable output power. The automatic reset circuit and current limiting circuit are to avoid over charging. The transformer controller has been fabricated with TSMC 0.50μm UHV 800V 2P3M CMOS process, which can convert 100 V~800 V into 4.15 V~5.95 V, and the chip area is 2.043 mm 3.057 mm.
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