Optimized EMI Reduction through Multi-phase Spread-Spectrum Clock Generator Designed for Buck Converter

• Main Authors: CHENG, SHEN, 鄭慎
• Other Authors: WENG, JUN HONG
• Format: Others
• Language: en_US
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/37720154482006962290

碩士 === 東海大學 === 電機工程學系 === 105 === In this work we present a multiphase spread-spectrum frequency modulation (multiphase SSFM) to diminish EMI using a multiphase spread-spectrum clock generator (multiphase SSCG) in multi-interleaving PWM buck converter. In general PWM switching converters, switching noise and harmonic noise causes excited ripple voltage resulting in EMI emission as buck converter reaches steady state. EMI will result in seriously interfering surrounding equipment and thus interrupting its operation, and furthermore, decreasing efficiency. The proposed SSFM technique is implemented by means of interleaving quadrature triangular waves, which is accomplished by means of DAC varying switching frequency between 500kHz and 800kHz. In addition, with a multi-interleaving PWM buck converter will obtain optimizing amplitude reduction of harmonic interference. There are three major parts in this paper. The first part describes brief introduction of PWM buck converter and SSFM. The second part elaborates on the concepts of multiphase SSCG and multi-interleaving PWM buck converter. The significantly third part demonstrates the implementation of the proposed circuit in detail, including simulations of subcircuits and measurement of the chip. The circuit is fabricated in TSMC CMOS 0.18μm technology and the whole chip area occupies 1.15 x 1.19 mm2, showing a significant 21 dB EMI reduction in the conducted EMI disruptions.