| Summary: | 碩士 === 亞洲大學 === 資訊工程學系 === 105 === Because of electronic technologies products performance increase day by day, for Power supply needed also increasing, so for the device electricity efficiency related technologies are more important than before. In all electronic products will having DC to DC, DC to AC, AC to DC or AC to AC switching. How to reduce the power loss on device switching to let device achieve more energy efficiency become the most focus part of the electronic product. But some international manufacturers company have lot of technology and patents because they go into the research of High Voltage device more earlier and Taiwan's device company only recently began to enter this area now.
BCD technology, which is mean integration for three different components: Bipolar, CMOS and DMOS on the one chip. Was proposed by STMicroelectronics in 1984 and called BCD1. The BCD1 is based on 4μm 60V VDMOS and till now they evolve to the 10th generation called BCD10. Which is based on now most popular technology of 90nm BCD process integration. In this study, HV LDMOS design base on 5th generation BCD5 0.6μm process technology. Because for the low cost and can for some 6” and 8” analog device fab to upgrade their product with using current equipment and process technology to help the old fab to transformation.
In this study will using T-CAD simulation tool with 0.6μm process technology to design a 60V HVLDMOS device under 500V UHV device process for process integration. Because of using 0.6μm technology, in the design will using LOCOS process for isolation. First, because the isolation oxide will having lot of effect for our device spec, we will explore for the different LOCOS oxidation model in our T-CAD simulation to fit the silicon result. After that we will using the Poly-Buffered LOCOS process technology to reduce the Bird’s Beak for our device about 40%. Then we will take the best model put into our HVLDMOS design and fit the device same with the device produce from fab. Because of the demand for automotive electronic components are increasing day by day, so in this study we will design our 60V HV LDMOS base on 500V UHV device process. Only fix our 60V NLDMOS and 60V PLDMOS implant process and structure design slightly. As application on the switching device or energy management components. The specifications of this study are based on Fairchild's 60V high-voltage components as a reference. Finally, our 60V NLDMOS’s breakdown is about 13V higher than the Fairchild component and Idsat was nearly 100% increase compare to Fairchild component. In the PLDMOS part, because PLDMOS is more difficult to develop. In this study, for PLDMOS specification although BVD almost same like Fairchild's, but Idsat still have 100% increase with Fairchild’s. So this 60V LDMOS device can application on switching device or energy management component very well.
Keyword: HVNLDMOS, HVPLDMOS, BCD integration, UHV device process, P-well.
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