Design of Wide Locking Range Divide-By-4 and Concurrent Oscillating Divide-By-2 Injection-Locked Frequency Dividers

• Main Authors: You-Liang Ciou, 邱友亮
• Other Authors: Sheng-Lyang Jang
• Format: Others
• Language: en_US
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/2eaucb

碩士 === 國立臺灣科技大學 === 電子工程系 === 105 === In this thesis, four different varieties of injection-locked frequency divider (ILFD): triple-resonance RLC-resonator divide-by-4 ILFD, concurrent oscillating divide-by-2 ILFD, current-reused divide-by-4 LC ILFD and current-reused divide-by-8 LC ILFD. First, a triple-resonance RLC-resonator divide-by-4 injection-locked frequency divider (ILFD) in the 0.18 μm CMOS process is presented. The locking range of conventional single-stage divide-by-4 LC-tank ILFD is limited due to using harmonic mixer with small frequency conversion gain. The studied linear mixer divide-by-4 ILFDs have wide locking range because of triple-resonance RLC resonator and overlapping locking ranges. At the drain-source bias of 1 V and at the incident power of 0 dBm, the locking range of the triple-resonance ILFD is 5.1 GHz (46.58 %) from 8.4 to 13.5 GHz. The core power consumption is 9.86 mW and the total area including the output buffer and the pads is 0.985 × 0.836 mm2. Next, a concurrent oscillating divide-by-2 injection-locked frequency divider (ILFD) in the 0.18 μm CMOS process is presented. The ILFD consists of two capacitive cross-coupled sub-ILFDs operate at 3.7 GHz and 5.1 GHz respectively. The two sub-ILFDs are coupled by a pair of MIM capacitors. By controlling the gate voltages of the switching transistors, the ILFD has three different operational modes, high-band dominant mode, low-band dominant mode and concurrent oscillation mode. In the concurrent mode, the free-running ILFD can generate differential signals at 3.7 GHz, 5.1 GHz and their harmonics and other cross-modulation products. At the injection power mode, the locked ILFD outputs only the fundamental and harmonics. At low-injection power mode, the ILFD outputs concurrent oscillating signals in addition to the locked fundamental. The wide-locking-mode figure of merit (FOM) of the ILFD is 27.96 with wide locking range 6.26 GHz from 5.63 to 11.89 GHz. The power consumption is 2.556 mW and the input power is 0 dBm. The low-power-mode figure of merit (FOM) of the ILFD is 48.8 with wide locking range 2.24 GHz from 5.71 to 7.95 GHz. The power consumption is 0.67 mW and the input power is 0 dBm. After that, a current-reused divide-by-4 LC injection-locked frequency divider (ILFD) implemented in the TSMC 0.18 μm 1P6M CMOS process is proposed. Conventional harmonic mixer divide-by-4 ILFD has limited locking range, and this thesis shows a wide locking range divide-by-4 LC ILFD designed with one linear mixer divide-by-2 n-core cross-coupled ILFD stacked on the top of the other linear mixer divide-by-2 n-core cross-coupled ILFD. At the supply of 1.6 V and at the incident power of 0 dBm, the locking range is 6.87 GHz (51.83 %) from 9.82 to 16.69 GHz. Low power mode is also measured. The free-running oscillation frequency is 3.75 GHz. The core power consumption is 16.288 mW and the die area is 0.644 ×0.91 mm2. Eventually, a current-reused divide-by-8 LC injection-locked frequency divider (ILFD) designed in the TSMC 0.18 μm CMOS process is proposed. The proposed current-reused ILFD is based on a ÷2 p-core LC ILFD stacking on a ÷4 n-core capacitive cross-coupled LC ILFD. Injection MOSFETS in both ÷2 and ÷4 ILFDs are used as linear mixers. At the supply of 1.7 V and at the incident power of 0 dBm, the locking range is 1.11 GHz (6.385 %), from the incident frequency 16.83 GHz to 17.94 GHz. The core power consumption is 9.537 mW and the die area is 0.931 × 1.2 mm2.