Design and Implementation of 12-bit SAR ADCs with Binary-Window DAC Switching Technique
碩士 === 國立臺灣科技大學 === 電子工程系 === 105 === This dissertation implements two successive-approximation registers (SAR) analog-to-digital converters (ADCs). The first is a 12-bit 20-MS/s SAR ADC in UMC 0.18µm CMOS. The second is a 12-bit 60-MS/s SAR ADC in UMC 55nm LPCMOS. In order to avoid large capacitanc...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2017
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| Online Access: | http://ndltd.ncl.edu.tw/handle/05097672315184836784 |