| Summary: | 碩士 === 國立臺灣大學 === 電信工程學研究所 === 105 === With the clock rate of the CPU increasing to the GHz frequency level, problems that are not very critical in the past become more serious in the high-speed (Gbit/s) data/signal transmission systems. Good differential signal and effective suppression of common mode noise are two vital factors in the high-speed signal transmission system to maintain high quality signal integrity.
The aim of this thesis is to propose a structure composed of a low impedance line connected with resistors between two high impedance lines to achieve the function of equalizer and common mode filter, which is different from conventional passive equalizer with only equalization function. The fundamental of this structure is mainly based on the intermediate open circuit properties in the differential line to achieve the common mode filter function. Meanwhile, due to the intermediate short circuit characteristic, the resistor can be grounded to suppress low frequency signal can achieve equalization effect. In addition, the circuit structures with different parameters are analyzed and equivalent models are proposed to compare with experimental and simulation results. In the measurement, the proposed structure exhibits excellent common mode noise suppression behavior. Under differential mode transmission, the intrinsically closed eye diagram is significantly improved and can be re-open.
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