Design of Millimeter-Wave CMOS Power Amplifiers with Multi-Mode Power Combining Techniques

碩士 === 國立清華大學 === 電機工程學系所 === 105 === Thanks to the mature semiconductor manufacturing, more and more consumer electronics become smaller and inexpensive but still remains high performance. Recently, the mobile communication and smart devices further promote the trend and form the complex industry c...

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Bibliographic Details
Main Authors: Guo, Wen-De, 郭文得
Other Authors: Liu, Yi-Chun
Format: Others
Language:en_US
Published: 2017
Online Access:http://ndltd.ncl.edu.tw/handle/5k97s6
Description
Summary:碩士 === 國立清華大學 === 電機工程學系所 === 105 === Thanks to the mature semiconductor manufacturing, more and more consumer electronics become smaller and inexpensive but still remains high performance. Recently, the mobile communication and smart devices further promote the trend and form the complex industry chains. The innovation and speed boosting of the communication system becomes a main target for the device manufacturers, for it could provide better user experience and bring more income. To satisfy the requirement of higher data rate, it is a reasonable choice to operate the devices at high frequency. V- and W-band are the popular research topics in the communicate systems due to the unexplored development potential. Regarding the former, the IEEE 802.11ad and IEEE 802.15 are proposed for high-speed wireless local area networks (WLAN) and they are expected to be the mainstream communication of the next generation with their security and high-speed. The latter reveals the huge possibilities for the license-free and high resolution of imaging system. In this thesis, three power amplifiers (PAs) are proposed with power combining techniques for larger output power in a 90-nm CMOS process. The first (work I) is designed to operate at W-band and the others are for V-band. In work I, it achieves a simulated power gain of 13.2 dB, a maximum power-added-efficiency (PAE) of 3.2%, and an output 1-dB compression point (OP1dB) of 9.1 dBm. In work II, multi-mode scheme for enhancing the low power efficiency is used, and the output saturation power (Psat) and peak PAE are 9.6 dBm and 8.4%, respectively. The last work shows a radial symmetric transformer combiner arrangement, which could reduce the chip area. It achieves a simulated OP1dB of 14.1 dBm and a maximum power gain of 18.6 dB with 3-dB bandwidth 11.5 GHz.