A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage

A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage

碩士 === 國立清華大學 === 電機工程學系所 === 105 === abstract hide

Bibliographic Details
Main Authors:	Huang, Hung-Jen, 黃弘任
Other Authors:	Ueng,Yeong-Luh
Format:	Others
Language:	en_US
Published:	2017
Online Access:	http://ndltd.ncl.edu.tw/handle/sjgebx

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