A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage

A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage

碩士 === 國立清華大學 === 電機工程學系所 === 105 === abstract hide

Bibliographic Details
Main Authors: Huang, Hung-Jen, 黃弘任
Other Authors: Ueng,Yeong-Luh
Format: Others
Language:en_US
Published: 2017
Online Access:http://ndltd.ncl.edu.tw/handle/sjgebx
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spelling ndltd-TW-105NTHU54410092019-05-15T23:53:46Z http://ndltd.ncl.edu.tw/handle/sjgebx A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage 使用儲存資料壓縮之交織最小最大值演算法的非二進制低密度奇偶檢查解碼器架構 Huang, Hung-Jen 黃弘任 碩士 國立清華大學 電機工程學系所 105 abstract hide Ueng,Yeong-Luh 翁詠祿 2017 學位論文 ; thesis 47 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 碩士 === 國立清華大學 === 電機工程學系所 === 105 === abstract hide
author2 Ueng,Yeong-Luh
author_facet Ueng,Yeong-Luh
Huang, Hung-Jen
黃弘任
author Huang, Hung-Jen
黃弘任
spellingShingle Huang, Hung-Jen
黃弘任
A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage
author_sort Huang, Hung-Jen
title A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage
title_short A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage
title_full A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage
title_fullStr A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage
title_full_unstemmed A Trellis Min-Max Layered Non-Binary LDPC Decoder Architecture Using Compressed Storage
title_sort trellis min-max layered non-binary ldpc decoder architecture using compressed storage
publishDate 2017
url http://ndltd.ncl.edu.tw/handle/sjgebx
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