FPGA Implementations of Real Time 3D Stereo Matching Based on Dynamic Programming

• Main Authors: Bo-chien Hsiao, 蕭博謙
• Other Authors: Shen-Fu Hsiao
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/fmetet

碩士 === 國立中山大學 === 資訊工程學系研究所 === 105 === Stereo vision is widely used in many computer vision applications including games, autonomous driving, object recognition, etc. Depth is the key information in stereo vision. In general, depth map is generated by stereo matching computation of two input images captured by cameras at different view angles. In this thesis, we use FPGA SoC platforms to realize a real-time dynamic programming-based stereo matching algorithm where the left and right input images are captured real-time and the computed depth maps are shown on screen. Image rectifications are also considered during the implementations. We study and analyze various hardware-software co-design options and improve the performance using different hardware platform environments.