| Summary: | 碩士 === 國立高雄第一科技大學 === 電腦與通訊工程系碩士班 === 105 === Taiwan, Japan, South Korea and other developed Asian countries are facing the impact of aging society. The older care and medical problems are gaining more and more attention. Use of high technology to help the health monitoring and prevention of the elderly is the future trend, which long-term records of Electrocardiography (ECG) data is one of the important medical information. ECG is a non-invasive diagnosis and treatment technique that detects micro-current on the surface of the skin and is widely used in the diagnosis of heart disease. For long periods of observation and recording, a wearable device that combines wireless transmission and signal sensing technology is one of the best options. Wearable devices have three basic requirements: small size, light weight and low power. As the wireless transmission is quite energy-consuming, its power consumption is proportional to the amount of data transmission. In order to reduce the amount of data and save medical diagnostic information, we have developed on wavelet transform-based ECG compression system with quality assurance mechanism in the early study.
The system consists of three functional processing units in series into a pipeline processing structure, respectively : Lossless rounding of Wavelet transform, Quantification of quality assurance mechanism, Set Partitioning in Hierarchical Trees(SPIHT). Lossless rounding of Wavelet transform is an integer operation focuses on minimum bit length notation, and it uses a lot of multipliers to use the Non-Recursive filters, improper application to wearable systems. We developed segment accumulation algorithm (SAA) in the previous study. It uses section folding technology and cyclic data movement to effectively overcome the high-order decomposition of the number of factors to grow the multiplier. Only 11 classes also require a lot of multipliers. This paper is presented with Bit-Series processing architecture to eliminate the multiplication required in SAA, to replace the multiplier. Without affecting the throughput conditions, it can effectively reduce the hardware area and power consumption.
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