| Summary: | 碩士 === 國立彰化師範大學 === 電子工程學系 === 105 === The TSV(Through-Silicon Via, TSV) is a passage between chip and chip in 3D-IC.TSVs can be classified as power TSV, data TSV and clock TSV.TSV is easily aged or failed by noise, thermal or electromagnetic effects. Especially, when the TSV is bearing huge current, it will be weaker. Although some paper has optimized the placement of TSV, the solution for the problem of aging and failing of TSV is relatively rare.
So, in this paper we proposed a system to solute the aging problem and make a fault tolerance placement of TSVs. In our proposed system, we could analyze the placement of the TSVs and make sure the power can be stably transmitted when K TSVs are broken in N TSVs.
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