The Location and Root Cause of the VLSI Leakage Path

• Main Authors: Mu, Chien-Lung, 穆劍龍
• Other Authors: Wu, Yew-Chung
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/7m4r2e

碩士 === 國立交通大學 === 工學院半導體材料與製程設備學程 === 105 === In this thesis, how to locate the single device leakage path of VLSI via failure analysis of Fourier transform application is the major research, we need to identify the root cause for unknown error product. Issued from the circuit designed by customer, without providing the correct path from customer, all we can do is checking step by step by failure analysis, to approaching the real cause. First of all, we use InGaAs electric failure analysis, detecting the micro light from the re-combination of electron and hole, to check if any leak issue in the circuit, and OBIRCH (Optical Beam Induced Resistance CHange), detecting the current signal from resistance changing which induced by laser hitting the die surface, material receives the heat to make resistance change, different material has different thermal resistance factor, which could be identified if any burned out or large current occurs ; Above two EFA methods, the real fail phenomenon need to judge by comparison between good sample and issued ones, presently, all samples are issued, it’s very difficult to point out the root cause. Therefore, in order to find out the root cause, we use thermal analysis with Fourier transform application in power supply, as a square wave power input, that makes issued sample real leakage could be detected without comparison between good and fail, in this thesis, we mentioned a very effective and easier understanding method to located the leakage path in a single device.