A High efficiency 16-Channel ICA RISC-V Processor for Biomedical Signal Processing
碩士 === 國立交通大學 === 電機工程學系 === 105 === To improve the performance of epileptic seizure detection, independent component analysis (ICA) is applied to multi-channel signals to separate artifacts and signals of interest. FastICA is an efficient algorithm to compute ICA. However, the number of channels wi...
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ndltd-TW-105NCTU54420122017-09-05T04:21:45Z http://ndltd.ncl.edu.tw/handle/19879372082744467690 A High efficiency 16-Channel ICA RISC-V Processor for Biomedical Signal Processing 用於生醫訊號處理之高效率十六通道獨立成分分析RISC-V處理器 Chen, Yu-Jui 陳俞睿 碩士 國立交通大學 電機工程學系 105 To improve the performance of epileptic seizure detection, independent component analysis (ICA) is applied to multi-channel signals to separate artifacts and signals of interest. FastICA is an efficient algorithm to compute ICA. However, the number of channels will limit by chip area. ICA has much matrix operations. The complexity of matrix is O (n2~3). It is hard to extend channel out of four to eight channels. In the case of ECoG signal, the electrode patches are fixed after installation. Some of the FastICA algorithm can be reduced because of fixed electrode patches. We only need one-time singular value decomposition for eigenvalue at first time. We can implement singular value decomposition by firmware in stand of hardware to reduce area. We can have more area to get more channels. The microcontroller can implement other protocol and signal process making this chip more applicable. The performance of the chip was verified by human dataset. Chiueh, Herming 闕河鳴 2016 學位論文 ; thesis 69 en_US |
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碩士 === 國立交通大學 === 電機工程學系 === 105 === To improve the performance of epileptic seizure detection, independent component analysis (ICA) is applied to multi-channel signals to separate artifacts and signals of interest. FastICA is an efficient algorithm to compute ICA. However, the number of channels will limit by chip area. ICA has much matrix operations. The complexity of matrix is O (n2~3). It is hard to extend channel out of four to eight channels. In the case of ECoG signal, the electrode patches are fixed after installation. Some of the FastICA algorithm can be reduced because of fixed electrode patches. We only need one-time singular value decomposition for eigenvalue at first time. We can implement singular value decomposition by firmware in stand of hardware to reduce area. We can have more area to get more channels. The microcontroller can implement other protocol and signal process making this chip more applicable. The performance of the chip was verified by human dataset.
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author2 |
Chiueh, Herming |
author_facet |
Chiueh, Herming Chen, Yu-Jui 陳俞睿 |
author |
Chen, Yu-Jui 陳俞睿 |
spellingShingle |
Chen, Yu-Jui 陳俞睿 A High efficiency 16-Channel ICA RISC-V Processor for Biomedical Signal Processing |
author_sort |
Chen, Yu-Jui |
title |
A High efficiency 16-Channel ICA RISC-V Processor for Biomedical Signal Processing |
title_short |
A High efficiency 16-Channel ICA RISC-V Processor for Biomedical Signal Processing |
title_full |
A High efficiency 16-Channel ICA RISC-V Processor for Biomedical Signal Processing |
title_fullStr |
A High efficiency 16-Channel ICA RISC-V Processor for Biomedical Signal Processing |
title_full_unstemmed |
A High efficiency 16-Channel ICA RISC-V Processor for Biomedical Signal Processing |
title_sort |
high efficiency 16-channel ica risc-v processor for biomedical signal processing |
publishDate |
2016 |
url |
http://ndltd.ncl.edu.tw/handle/19879372082744467690 |
work_keys_str_mv |
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