Investigation and Analysis of Random Variations on Hybrid TFET-MOSFET Monolithic 3D SRAMs Considering Interlayer Coupling

碩士 === 國立交通大學 === 電子研究所 === 105 === This thesis investigates the impact of interlayer coupling on the stability and performance of monolithic 3D 7T SRAM cell composed of TFETs and MOSFETs operating at ultra-low voltage. We compare the 3D result with 2D counterparts, and compared hybrid case with pur...

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Main Authors: Wang, Jian-Hao, 王建皓
Other Authors: Chuang, Ching-Te
Format: Others
Language:en_US
Published: 2016
Online Access:http://ndltd.ncl.edu.tw/handle/50885369754140973814
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spelling ndltd-TW-105NCTU54281262017-09-07T04:17:58Z http://ndltd.ncl.edu.tw/handle/50885369754140973814 Investigation and Analysis of Random Variations on Hybrid TFET-MOSFET Monolithic 3D SRAMs Considering Interlayer Coupling 混合穿隧式場效電晶體與金氧半場效電晶體於單晶三維積體靜態隨機存取記憶體考慮層間電耦合的隨機變異特性之研究及分析 Wang, Jian-Hao 王建皓 碩士 國立交通大學 電子研究所 105 This thesis investigates the impact of interlayer coupling on the stability and performance of monolithic 3D 7T SRAM cell composed of TFETs and MOSFETs operating at ultra-low voltage. We compare the 3D result with 2D counterparts, and compared hybrid case with pure MOSFET case. In addition, we investigate the impact of WFV and LER for monolithic 3D SRAMs considering interlayer coupling. TCAD simulation result indicates that the planar (2D) 7T hybrid TFET-MOSFET SRAM cell exhibits equal leakage, better stability and performance compared with the conventional 2D 8T MOSFET SRAM at ultra-low voltage (VDD ≤ 0.3V). The interlayer coupling, where the front-gate of the bottom tier device alters the back gate bias of the upper tier device, and various stacking and layout arrangements are examined and exploited to improve the stability and performance of monolithic 3D SRAMs. An optimized 3D design is shown to exhibit the best WSNM and cell write performance improvement over the planar design. However, the hybrid case has better improvement than pure MOSFET case. Furthermore, 3D SRAM designs reduce cell area by 40%. The impacts of work function variation (WFV) and line edge roughness (LER) on SRAM cell stability, leakage power and performance are investigated and compared. The results indicate that WFV and LER have different impacts on read disturb and Vwrite,0, which dominate SRAM stability and is determined by the distinct current drive of TFET and MOSFET. The performance is influenced by the different variations of gate capacitance (Cg) under WFV and LER. Chuang, Ching-Te 莊景德 2016 學位論文 ; thesis 53 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 碩士 === 國立交通大學 === 電子研究所 === 105 === This thesis investigates the impact of interlayer coupling on the stability and performance of monolithic 3D 7T SRAM cell composed of TFETs and MOSFETs operating at ultra-low voltage. We compare the 3D result with 2D counterparts, and compared hybrid case with pure MOSFET case. In addition, we investigate the impact of WFV and LER for monolithic 3D SRAMs considering interlayer coupling. TCAD simulation result indicates that the planar (2D) 7T hybrid TFET-MOSFET SRAM cell exhibits equal leakage, better stability and performance compared with the conventional 2D 8T MOSFET SRAM at ultra-low voltage (VDD ≤ 0.3V). The interlayer coupling, where the front-gate of the bottom tier device alters the back gate bias of the upper tier device, and various stacking and layout arrangements are examined and exploited to improve the stability and performance of monolithic 3D SRAMs. An optimized 3D design is shown to exhibit the best WSNM and cell write performance improvement over the planar design. However, the hybrid case has better improvement than pure MOSFET case. Furthermore, 3D SRAM designs reduce cell area by 40%. The impacts of work function variation (WFV) and line edge roughness (LER) on SRAM cell stability, leakage power and performance are investigated and compared. The results indicate that WFV and LER have different impacts on read disturb and Vwrite,0, which dominate SRAM stability and is determined by the distinct current drive of TFET and MOSFET. The performance is influenced by the different variations of gate capacitance (Cg) under WFV and LER.
author2 Chuang, Ching-Te
author_facet Chuang, Ching-Te
Wang, Jian-Hao
王建皓
author Wang, Jian-Hao
王建皓
spellingShingle Wang, Jian-Hao
王建皓
Investigation and Analysis of Random Variations on Hybrid TFET-MOSFET Monolithic 3D SRAMs Considering Interlayer Coupling
author_sort Wang, Jian-Hao
title Investigation and Analysis of Random Variations on Hybrid TFET-MOSFET Monolithic 3D SRAMs Considering Interlayer Coupling
title_short Investigation and Analysis of Random Variations on Hybrid TFET-MOSFET Monolithic 3D SRAMs Considering Interlayer Coupling
title_full Investigation and Analysis of Random Variations on Hybrid TFET-MOSFET Monolithic 3D SRAMs Considering Interlayer Coupling
title_fullStr Investigation and Analysis of Random Variations on Hybrid TFET-MOSFET Monolithic 3D SRAMs Considering Interlayer Coupling
title_full_unstemmed Investigation and Analysis of Random Variations on Hybrid TFET-MOSFET Monolithic 3D SRAMs Considering Interlayer Coupling
title_sort investigation and analysis of random variations on hybrid tfet-mosfet monolithic 3d srams considering interlayer coupling
publishDate 2016
url http://ndltd.ncl.edu.tw/handle/50885369754140973814
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