| Summary: | 碩士 === 國立交通大學 === 資訊科學與工程研究所 === 105 === The HBT-86 is an LLVM-based retargetable hybrid binary translation system. The source binary Instruction Set Architectures (ISA) supported by HBT-86 including x86-32and x86-64 integer instructions, x87 floating-point instructions, and Streaming SIMD Extensions (SSE). Furthermore, HBT-86 can generate target binary that can be executed on x86-32, x86-64, and ARM target platforms.
In recently years, Intel proposed Advanced Vector Extensions (AVX) which is a 256-bit instruction set extension to SSE. However, HBT-86 has not supported AVX ISA yet, and thus it cannot successfully emulate the binary executable which contains AVX instructions. Therefore, our research aims to design and implement the emulation of AVX instructions on HBT-86. In this thesis, we translate the LLVM Machine Code into LLVM intermediate representation (IR) and emulate the behavior of AVX instructions and registers in the translated code. Besides, we also improve the supportiveness and compatibility of SSE in HBT-86. Moreover, we increase the supportiveness of system call.
We compare our system with the Bochs which is a full emulator written in C++ and uses software emulation to emulate every instruction. It supports x86-32 and x86-64 source/target executable. In our AVX x86-32 to x86-64 emulation, our HBT-86 is 11.02 and 14.35 times faster than Bochs for integer and floating-point benchmark, respectively. While comparing with the native binary code, our HBT-86 is 4.16 and 3.34 times slower for integer and floating-point benchmarks, respectively. Finally, our HBT-86 may translate our AVX benchmarks into ARM binary code and execute these code on an ARM platform successfully.
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