Repairable Cell-Based Chip Design for Simultaneous Yield Enhancement and Fault Diagnosis
碩士 === 國立成功大學 === 電機工程學系 === 105 === Fault diagnosis plays a major role in IC yield enhancement. Due to circuit structure and ATPG limitation, there exist many undistinguished fault pairs after applying test patterns and diagnosis patterns, including equivalent fault pairs and aborted fault pairs. T...
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| Format: | Others |
| Language: | en_US |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/n863jj |
| Summary: | 碩士 === 國立成功大學 === 電機工程學系 === 105 === Fault diagnosis plays a major role in IC yield enhancement. Due to circuit structure and ATPG limitation, there exist many undistinguished fault pairs after applying test patterns and diagnosis patterns, including equivalent fault pairs and aborted fault pairs. This thesis proposes a scan-based repair-for-diagnosis architecture that can distinguish undistinguished fault pairs by repairing cell defects. A repairable standard cell design technique is presented that makes the repair of defective cells easy to control. To efficiently distinguish all targeted undistinguished fault pairs, a novel fault-grouping method is developed and applied to the proposed scan-based repair-for-diagnosis architecture. With this architecture, one can distinguish multiple fault pairs and repair those defective cells hence improving yield at the same time. Experimental results show that our proposed architecture can distinguish all targeted undistinguished fault pairs and repair the defective cells with low area overhead.
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