Summary: | 碩士 === 國立成功大學 === 微電子工程研究所 === 105 === The implementation of SPDT and DPDT switch in MMIC application is presented in this thesis. The SPDT switch uses shunt-shunt transistor topology to get lower insertion loss and better isolation. The operation frequency of this work is 14 GHz – 24 GHz, the insertion loss is 3.3 dB, and the isolation of 24 dB. The structure is simple, and the chip size is 1.45mm × 1.67mm. For the DPDT switch, it utilizes diode to implement the circuit due to the smaller parasitic capacitance when frequency goes high. It also add a coupler at both input and output port to enhance port-to-port isolation and restrain the signal at high frequency. This work operates at 38 GHz – 43 GHz, the insertion loss is less than 5 dB, and isolation of 15 dB. The chip area is 1.55 mm×1.15mm. An application of the DPDT is also introduced, it combines the DPDT switch with one power amplifier and one low noise amplifier, thus forms a compact structure of a RF front-end system. It can choose its transceiver type due to the signal traveling distance.
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