Host-hinted Write Buffer Management Scheme

碩士 === 國立中興大學 === 資訊科學與工程學系 === 105 === Abstract Recently, NAND flash memory-based SSD is developing rapidly. It has many advantages such as small size, light weight, high shock resistance, low power consumption. However, due to certain physical characteristic of NAND flash memory, it has the asymme...

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Bibliographic Details
Main Authors: Ren-Jie Lee, 李仁傑
Other Authors: Hsung-Pin Chang
Format: Others
Language:zh-TW
Published: 2017
Online Access:http://ndltd.ncl.edu.tw/handle/87404103564446919162
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Summary:碩士 === 國立中興大學 === 資訊科學與工程學系 === 105 === Abstract Recently, NAND flash memory-based SSD is developing rapidly. It has many advantages such as small size, light weight, high shock resistance, low power consumption. However, due to certain physical characteristic of NAND flash memory, it has the asymmetric speed of read and write operations, inability to in-place updates, limited number of write and erase times, and these disadvantages are clearly related to the action of writing, thus resulting in poor performance of NAND flash memory. To address the issue, one of the methods is adding a piece of RAM, which is known as write buffer, in SSDs. Consequently, we can update the hot data in the write buffer directly, so as to eliminate the frequencies of writing to NAND flash memory. In this these, we propose a Host-hinted Write Buffer Management Scheme. By exploiting the cross-layer information, we convey the related host information to the device to improve the performance of the whole system. Previously, data is written to the write buffer only when the data is replaced in page cache. In the thesis, we simultaneously considers the replacement the Linux flush operation in page cache to the impact the write buffer management. Specially, when the write buffer is full and needs to select a victim block for replacement, we utilizes the information passed from the page cache to help the write buffer to select the most appropriate victim block for replacement. From the experimental results, our proposed scheme can successfully increase the hit ratio of write buffer and reduce the number of write operations to the flash memory.