Reduction of Conflict Misses with a Page Re-Mapping Mechanism
碩士 === 逢甲大學 === 資訊工程學系 === 105 === Nowadays, Process Technology grows fast as the Moore's law predicted, the core numbers and cache sizes progress in the same chip area. Recently the Cache memory’s size on each hierarchy are bigger than 4KB page size, then when the L1 Cache set number is bigger...
Main Authors: | CHUNG, CHIA-HSIANG, 鍾佳翔 |
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Other Authors: | CHEN, CHING-WEN |
Format: | Others |
Language: | zh-TW |
Published: |
2017
|
Online Access: | http://ndltd.ncl.edu.tw/handle/96649736012069168860 |
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