A Novel Two-layered Architecture to Support Flexible Distributed Control in OpenFlow Networks

• Main Authors: CHEN, CHEN-HUA, 陳振華
• Other Authors: Steven S. W. Lee
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/8fv2z6

碩士 === 國立中正大學 === 通訊工程研究所 === 105 === The central control architecture of the software definition network has a corresponding problem compared to the traditional network architecture, although it has the advantages of using good network resources. For a large scale network or a network in a highly dynamic environment, the central controller is easy to become a bottleneck. Besides, a central controller is vulnerable to device damage. The failure of the controller will cause the malfunction of the entire network. In addition, except using group actions to handle port down, commercial OpenFlow switches are not able to handle events automatically. The central controller has to detect OpenFlow switch state through periodic polling. Lacking capabilities for handling events introduces not only extra burden on the controller but also extra delays on processing time. In this research, we propose using the 2-layered distributed control scheme for managing an OpenFlow network. We adopt multiple central controllers to enhance the reliability of the control plane. There is a local controller embedded inside each OpenFlow switch. The local control is responsible for performing control and management under the supervision of central controllers. We introduce new signaling messages for OpenFlow to enable the central controller for assigning jobs to the local controllers. In addition, with the help of local controller, we also include new event handling capabilities for OpenFlow switches. By doing so, the central controllers and local controllers can collaborate together to control the SDN network. And we implement our central controllers through the extension of ONOS control program. For the OpenFlow switch side, we implement our local controller on a micro-processor based embedded system. And we integrate the whole system in a testbed to evaluate the performance of our design.