| Summary: | 碩士 === 國立中正大學 === 通訊工程研究所 === 105 === As the multiple input multiple output (MIMO) techniques develop, the use of large number of antennas and high modulation schemes is able provide high throughput-rate data communication. In the meantime, the computational complexity for the MIMO detector, especially the nearly optimal tree search detectors, also grows. The tree search MIMO detectors are divided into two categories: the hard-output detection and soft-output detection. Requiring higher computational complexity, the soft-output detector can provide bit likelihood ratios (LLRs) to the subsequent channel decoder to recover coded bits with lower error probability. In this thesis, we apply the LORD (Layered ORthogonal lattice Detector) algorithm to detect the 64-QAM modulated signals transmitted over the 4-by-4 space division multiplexing (SDM) MIMO system. The first step of the LORD detector is to compute the QR-decomposition (QRD) of multiple permuted channel matrices. To facilitate timing control due to matrix permutation, we insert a null signal (e.g., signal 0) between the input channel matrix and the identity matrix. The QRD output Q- and R-matrix pairs are permuted and are triangulated to generate the desired QRD matrix pairs. Next, Orthogonal Real Value Decomposition (ORVD) are used to convert the complex-valued signal model to the real-valued signal model. For the tree search, we use our proposed lookup table (LUT) modified fixed sphere decoder (FSD) algorithm. In our algorithm, we use LUT to for the root node to span child nodes at the top two layers. The nodes on other layers span only one child nodes. Also, the maximum likelihood (ML) enhancement technique is used to improve the quality of our bit LLR calculation. Under the TSMC 90nm CMOS process environment, we synthesize our design by the Synopsys Design Compiler, and, place-and-route by the Cadence SOC Encounter. While operating at frequency 250MHz, our design can reach detection throughput rate at 1 Gbps.
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