Design and Analysis Wideband Continuous-Time ΔΣ Modulators for Medical Ultrasound Imaging Systems

博士 === 國立中正大學 === 電機工程研究所 === 105 === This research designs the capacitive micromachined ultrasonic transducers (CMUTs) and continuous-time sigma-delta modulators, applied to high-resolution ultrasound imaging systems. The ultrasound systems includes ultrasound transducers, low-noise amplifiers, fil...

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Bibliographic Details
Main Authors: CHENG, TENG-CHUAN, 鄭登全
Other Authors: TSAI, TSUNG-HENG
Format: Others
Language:en_US
Published: 2017
Online Access:http://ndltd.ncl.edu.tw/handle/92088623035238161161
Description
Summary:博士 === 國立中正大學 === 電機工程研究所 === 105 === This research designs the capacitive micromachined ultrasonic transducers (CMUTs) and continuous-time sigma-delta modulators, applied to high-resolution ultrasound imaging systems. The ultrasound systems includes ultrasound transducers, low-noise amplifiers, filters, analog-to-digital converters, and image processing units. Five CMUT architectures are proposed to enhance the sensitivity by 5.8 times and higher linearity is achieved. For continuous-time sigma-delta modulators three new architectures are proposed to improve clock jitter and excess loop delay. Forecast architecture is designed to send the predictive values from the quantizer back into the loop filter. Nearly double time of the clock cycle for tolerating excess loop delay is achieved, and SNDR is 70 dB. Modified stack architecture utilizes direct connection of the first stage output to the third stage integrator and provides a compensation path to the second stage output, thereby reduces the extra delay of the primary path and keep the integration capability of the loop filter, and SNDR is 83.6 dB. Furthermore, zero compensation is designed to improve the attenuation coefficients of the resonator. Digital integrator feedback architecture utilizes the DAC feedback at the first stage integrator output. The feedback path benefits from the first-order noise shaping, which can tolerate 77 ps DAC clock jitter while maintaining SNDR of 72 dB. The continuous-time delta-sigma modulator achieves a bandwidth of 44 kHz to 8 MHz with a quality factor of 0.056 J/conv.. The chip is fabricated in 180 nm standard CMOS process.