A 1.8/2.6 GHz CMOS High Linearity Power Amplifier For LTE Application

• Main Authors: Chih-Huang Lin, 林志皇
• Other Authors: Jeng-Rern yang
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/54422987004616797801

碩士 === 元智大學 === 通訊工程學系 === 104 === The research presents a “high linearity cmos power amplifier”. This PA employed active inductor and transistor switch technique. Cascode structure can solve the low breakdown voltage and have high power gain, cascode was used. The active inductor can reduce the chip area. Multiband of the power amplifier by using transistor switch or using Mos varactor. Transistor switch was used for change two inductors. Mos Varactor was used for control the voltage value .The simulation result shows that the circuit exhibited by switch circuit a power gain of 25.9 dB, an input return loss less than -20.2/20.9dB, the PAE is about 35%/31.2% and the output power is about 21.6/18.2 dBm at 1.8/2.6GHz.The power consumption is 378mW at voltage of 3.3V.