Improving Cache Performance with an ExtraCache

• Main Authors: Yu-Ting Wu, 吳宇庭
• Other Authors: Yi-Yu Liu
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/3ycr35

碩士 === 元智大學 === 資訊工程學系 === 104 === To amortize the performance gap between processor and memory, cache has become one important component in a computer system. However, we find that cache access behavior is unbalanced among different cache sets. We utilize the concept of victim cache as extraCache for a certain cache sets (VIP sets) to alleviate the unbalanced cache access problem. In this thesis, we use static VIP cache set to reduce cache miss rate. Since static VIP cache set miss rate is different, we can further provide more extraCacahe blocks for a few VIP cache sets with high cache access counts to reduce miss rate. Compared to a conventional cache with doubled cache size (i.e., 100% area overhead), the proposed extraCache achieves similar performance improvement with only 25% area overhead.