Application for GCIP Model to Non-volatile Memory in HK/MG NMOSFET

• Main Authors: Li-Fu Yang, 楊理夫
• Other Authors: Shea-Jue Wang
• Format: Others
• Language: en_US
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/9n2rp7

碩士 === 國立臺北科技大學 === 機電整合研究所 === 104 === The MOSFETs oxide thickness is sustained decreases, MOSFETs leakage current be-comes bigger, so use HK / MG replace SiO2 or SiON as the current mainstream method; Leakage current not only cause unnecessary power consumption of the MOSFETs, The memory device to read and write is also cause significant interference. Because there are few studies of GCIP and CHC to program on logic device, so this is our point of the thesis. In our experiment, the manufactory UMC 28 nm advance process which channel length is between 0.15 μm to 0.24 μm sample would be used. The gate terminal use the HfxZryOz ( HfOx/ZrOx/HfOx ) dielectric with atomic layer deposition (ALD) technology. For our re-search, the behavior of memory program have two methods. The first behavior is programed by CHC. As MOSFET operate in saturation region, this condition will be affected by high electric field that induced not only impact-ionization but also FN tunneling which increase opportunity for the electric enter in the oxide layer. The other behavior use Gate Current Induced Punch-through Model ( GCIP Model ) that source current access to the reverse direction and generate electron-hole pair to the program resource. The gate terminal provide bias that electric can get away from the excitation situation and program to the gate. Electric will charge to the dielectric layer trap as the behavior same to the program process from memory device. In the results of this thesis, writing speed of GCIP Model is shower than CHCI. Because GCIP Model initial current is lower than CHCI; But the GCIP program with small gate voltage bias is less than CHCI, Those appearance that the GCIP Model have slower program speed but low energy consuming. In the future, I think we can improve GCIP Model program speed such as increase gate voltage to strengthening perpendicular Electric Fields to attract electrons. In-crease the drain voltage that lead the range of GCIP increase.