Design and Implementation of Current Control Loop for Servo Drives Based on AD Converter with Delta Sigma Modulator

• Main Authors: Shih-Yeh Lin, 林釋彥
• Other Authors: Yen-Shin Lai
• Format: Others
• Language: zh-TW
• Online Access: http://ndltd.ncl.edu.tw/handle/9h5jtj

碩士 === 國立臺北科技大學 === 電力電子產業研發碩士專班 === 104 === The objective of this thesis is to design and implement current control loop for servo drives using AD converter with Delta-Sigma modulator. An FPGA-based controller with Texas Instruments produced Delta-Sigma Modulator AMC1305 is implemented. With the oversampling technique, decimation filtering, and quantization noise shaping, to achieve high resolution and excellent antialiasing filtering. The achievable bandwidth is limited by the delay time, which is caused by the undesired facts including current/position feedback delay, computation delay of digital control and PWM delay. To shorten the delay time, an FPGA-based controller with parallel handling of the current control process is used. The test results show the current sampling delays for Delta-Sigma ADC and SAR ADC are 76μs and 50μs, respectively. Thereby, the current bandwidth for Delta-Sigma ADC is reduced from 1.67 kHz to 2.36 kHz as compared to that for SAR ADC.