Study and Implementation of a Digital-Controlled Interleaved Boost Power Factor Corrector

• Main Authors: Chih-Wei Kuo, 國志偉
• Other Authors: none
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/06508698360797915885

碩士 === 國立臺灣科技大學 === 電子工程系 === 104 === This thesis presents the design and implementation of a two-phase digitally-controlled interleaved boost power factor corrector (PFC) with high power factor (PF) and high efficiency. Fixed switching frequency and average current mode control are used to reduce input current harmonics and reshape the input current to be sinusoidal and in phase with the input voltage. Therefore, high power factor and conversion efficiency can be fulfilled. A two-phase interleaved topology has lower ripple currents and input current harmonic distortion. Therefore, the sizes of power components can be smaller and the power density can be higher. A TI DSP chip, TMS320X28035, is applied as the main controller to fulfill the average-current mode control. Compared with its analog counterpart, a digital controller features flexibility through programmability, higher reliability, and better noise and temperature immunity. Finally, a 1kW DSP-based interleaved boost PFC is implemented with an input voltage of 110 Vrms and 220 Vrms, an output voltage of 380 V, and the rated output current of 2.632 A.