Applications and Implementations of Silicon-Based Oscillators at RF Region

博士 === 國立清華大學 === 電機工程學系 === 104 === In this dissertation, three techniques in relation to oscillators are proposed for integrated RF system. Four chips are implemented in CMOS based these techniques. First of all, a direct-coupled technique for standing wave oscillator (SWO) arrays is presented. Th...

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Bibliographic Details
Main Authors: Chen, Yen Ju, 陳彥如
Other Authors: Chu, Ta Shun
Format: Others
Language:en_US
Published: 2016
Online Access:http://ndltd.ncl.edu.tw/handle/57542924675032947641
Description
Summary:博士 === 國立清華大學 === 電機工程學系 === 104 === In this dissertation, three techniques in relation to oscillators are proposed for integrated RF system. Four chips are implemented in CMOS based these techniques. First of all, a direct-coupled technique for standing wave oscillator (SWO) arrays is presented. The oscillation currents of a unit cell in the SWO array directly inject to adjacent cells through the resonator. Two 2-D SWO arrays based on the technique are reported. The first one can provide synchronous signals with identical frequencies, amplitudes, and phases at multiple locations over a chip. It is implemented in a 90-nm CMOS technology with 61.5-GHz oscillation frequency. Millimeter-wave radiators that consists of the proposed 2-D SWO array, an RF driver array, and an on-chip loop antenna array are implemented in a single chip to verify the synchronicity via wireless measurement. The indirect evidence of synchronicity is provided from the correlation between the wireless measured effective isotropic radiated power (EIRP) and phase noise of 1x1, 2x2, and 3x3 arrays. The EIRP in the normal direction of the array is increasing by a factor of 10logN^2 and the phase noise is reducing by a factor 10logN of over that of a single cell, where N is the number of unit cells in the array. The second SWO array can provide synchronous signals with identical frequencies, amplitudes, and multiple phases at multiple locations over a chip. It is implemented in a 65-nm CMOS technology with 132.5-GHz fundamental frequency. The SWO array is designed for 2-D second harmonic (265-GHz) spatial power radiating and combining. The second technique is realized in a THz antenna array receiver in 65-nm CMOS. The receiver is a double-conversion superheterodyne architecture. The first down-conversion is accomplished by a self-oscillating 3X subharmonic mixer frontend, and the second down-conversion is performed by a Gilbert-cell mixer and a local oscillator. The receiver is co-designed and integrated with a 4-element loop antenna array. By mixing an RF input signal at 312 GHz with the third harmonic of the 96.1GHz LO, the first IF of 23.8 GHz is produced. The second LO is at frequency of 22.3 GHz, and the second IF is 1.5 GHz. An RF built-in self-test (BIST) bench on local oscillator phase noise is presented in the last work. An injection-locked-oscillator phase discriminator integrated with a 2.56-GHz phase-locked loop in a 65-nm CMOS technology is proposed in this bench. In comparison with a signal source analyzer, the RF-BIST bench provides the phase noise profile with 0.9-dB, 1.2-dB, and 2.6-dB errors at 100-kHz, 1-MHz, and 10-MHz offset frequencies respectively.