Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs
碩士 === 國立清華大學 === 資訊工程學系 === 104 === We propose a remapping algorithm to tolerate the failures of Processing Elements (PEs) on Multiprocessor System-on-Chip. A new graph modeling is proposed to precisely define the increase of communication cost among PEs after remapping. Our method can be used not...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/43139483999873404051 |