Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs

碩士 === 國立清華大學 === 資訊工程學系 === 104 === We propose a remapping algorithm to tolerate the failures of Processing Elements (PEs) on Multiprocessor System-on-Chip. A new graph modeling is proposed to precisely define the increase of communication cost among PEs after remapping. Our method can be used not...

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Main Authors: Chen, Chia Ling, 陳嘉聆
Other Authors: Hwang, Ting Ting
Format: Others
Language:en_US
Published: 2016
Online Access:http://ndltd.ncl.edu.tw/handle/43139483999873404051
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spelling ndltd-TW-104NTHU53920602017-08-27T04:30:16Z http://ndltd.ncl.edu.tw/handle/43139483999873404051 Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs 以溝通導向作處理元件重映於單晶片網路之容錯多處理器系統 Chen, Chia Ling 陳嘉聆 碩士 國立清華大學 資訊工程學系 104 We propose a remapping algorithm to tolerate the failures of Processing Elements (PEs) on Multiprocessor System-on-Chip. A new graph modeling is proposed to precisely define the increase of communication cost among PEs after remapping. Our method can be used not only to repair faults but also to improve the communication cost of given initial mapping results​. Experimental results show that under multiple failures, the communication cost by our method is 43.59\% less on average compared with that by previou​s work [1] using the same ​number of ​spare PEs. Moreover, the communication cost is further reduced by 4.16\% after applying our method ​to​ initial mappings produced by NMAP [2]. Hwang, Ting Ting 黃婷婷 2016 學位論文 ; thesis 30 en_US
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language en_US
format Others
sources NDLTD
description 碩士 === 國立清華大學 === 資訊工程學系 === 104 === We propose a remapping algorithm to tolerate the failures of Processing Elements (PEs) on Multiprocessor System-on-Chip. A new graph modeling is proposed to precisely define the increase of communication cost among PEs after remapping. Our method can be used not only to repair faults but also to improve the communication cost of given initial mapping results​. Experimental results show that under multiple failures, the communication cost by our method is 43.59\% less on average compared with that by previou​s work [1] using the same ​number of ​spare PEs. Moreover, the communication cost is further reduced by 4.16\% after applying our method ​to​ initial mappings produced by NMAP [2].
author2 Hwang, Ting Ting
author_facet Hwang, Ting Ting
Chen, Chia Ling
陳嘉聆
author Chen, Chia Ling
陳嘉聆
spellingShingle Chen, Chia Ling
陳嘉聆
Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs
author_sort Chen, Chia Ling
title Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs
title_short Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs
title_full Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs
title_fullStr Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs
title_full_unstemmed Communication Driven Remapping of Processing Element in Fault-tolerant NoC-based MPSoCs
title_sort communication driven remapping of processing element in fault-tolerant noc-based mpsocs
publishDate 2016
url http://ndltd.ncl.edu.tw/handle/43139483999873404051
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