Summary: | 碩士 === 國立清華大學 === 資訊工程學系 === 104 === Logic circuits are classified into two categories: combinational circuits and sequential ones. However, combinational circuits could be cyclic, and cyclic combinational circuits are combinational circuits with feedback loops. That is, all the values in the cyclic combinational circuits are still fixed. Recently, some works have focused on the synthesis of cyclic combinational circuits such that the cyclic version of a combinational circuit can be available if it exists. Cyclified combinational circuits could take advantages of reducing area and timing. However, its testing problem is more complex than acyclic combinational circuits, and is still seldom discussed. In this work, we analyze the testing issue of cyclic combinational circuits and propose satisfiability-based automatic test pattern generation. The experimental results show that the proposed method can reach a high fault coverage for a set of cyclic combinational circuits.
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