Implementation of Two Port Modulator Using Fractional-N Frequency Synthesizer of Delta-Sigma Modulation Technique

• Main Authors: CHIA,WEI-LIN, 林珈緯
• Other Authors: Chien-Wen Chiu
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/13944925337276055790

碩士 === 國立宜蘭大學 === 電子工程學系碩士班 === 104 === This thesis aims at implementing a two-port FM modulator by using a PLL-based fractional-N frequency synthesizer with sigma-delta modulation technique. The finished study consists of designing a VHF-band voltage controlled oscillator and complete a fractional-N frequency synthesizer and two-port FM modulator. A Colpitts oscillator is configured as the emitter-feedback architecture and implemented by using μPA862TD as active devices and JDV2S08FS as varators. The designed band is allocated from 136 MHz to 174 MHz in order to meet the specification requirement of TIA-603. The fractional synthesizer is implemented by the Skyworks’s SKY72300-362 PLL IC which is controlled by a STMicroelectronics STM32F10X microprocessor via SPI bus to transfer data, clock and chip select information to the synthesizer. The layout tool, Altium Design 10, is applied to layout the PCB board which we use six layers of stack to make sure every signal layer is protected by GND planes to reduce impacts of noise. The overall thickness of the PCB board is only 0.899 mm and the board matreia is FR-4. The designed circuit of the VCO is simulated by the ADS circuit simulator and also constructed to verify its performance. The measured inclue (1) the oscillation frequencies range from 130.75 MHz to 174.25 MHz, (2) the output power is from 0.19 dBm to 1.21 dBm, (3) phase noise at 136 MHz is -97.049 dBc/Hz when the frequency offset is 12.5 kHz and offset is -103.16 dBc/Hz when the offset is 25 kHz. The phase noise at 174 MHz is -110.97 dBc/Hz when the frequency offset is 12.5 kHz and -117.38 dBc/Hz at 25 kHz offset, and (4) the power difference between the fundamental at 136 MHz and the second harmonic is 25.505 dB and 32.121 dB at 174 MHz. All of the above results are good agreement with those of the TIA standard. After the VCO hardware is put into the closed phase-lock loop, the closed loop works well. The phase noise at 136 MHz reduces to -106.76 dBc/Hz when the frequency offset is 25 kHz. The phase noise reduces to -113.92 dBc / Hz at the frequency offset 12.5 kHz and -121.07 dBc/Hz at 25 kHz offset. They are better than the open-loop results of the VCO. The lock times of the closed loop are about 22.5 ms at 136 MHz and 18.75 ms at 174 MHz. Finally, we have implemented the two-port FM modulator system where carrier operates from 136 MHz to 174 MHz. A 1 kHz sinewave signal generated by an arbitrary function generator is fed into the two input modulation ports of our constructed system in order to obtain a FM output signal with 5 kHz frequency deviation. Also, a precise FM modulation output signal with 5 kHz frequency deviation is generated by Agilent’s RF signal generator, HP 8648A. It acts as a standard signal compared with that generated by our system. The comparison shows a good agreement. The output modulation signal by the two-port modulation system achieves the specification requirement of the TIA-603 limitation, ie, the channel space is 25 kHz, and frequency deviation of the FM output is ±5 kHz, which has constant modulation sensitivities.