Deadlock-Free Algorithmic Routing for 3D Network-on-Chip Architectures
碩士 === 國立東華大學 === 資訊工程學系 === 104 === With the rapid advance in chip manufacturing technology, more and more functions and modules can be integrated into a single chip. Today, tens or hundreds of silicon intellectual property (IP) cores can be placed on a single chip. Such a system-on-chip (SoC) desi...
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| Format: | Others |
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2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/63314887027088387040 |