Design and Application of Morphological Image Processing Hardware Accelerator

• Main Authors: Ming-yan Luo, 羅鳴雁
• Other Authors: 陳慶瀚
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/4hj8q4

碩士 === 國立中央大學 === 資訊工程學系 === 104 === Most researches put emphasis on the hardware accelerator for mathematical morphology. If there is something wrong, the architecture will need to be redesigned. In this paper, MIAT (our laboratory) system methodology is used to design a high flexible and programmable morphological hardware accelerator. There are several morphology models (Mathematical Morphology Function Block) inside and pipeline control is used to improve each MMFB’s efficacy. We use software to control its hardware performance. By these means, it can achieve high flexibility and general purpose. We use barcode identification to verify this architecture. Noise is deleted with erosion operator and the origin image information is got by dilation. Finally, get the result with identification. The contribution of this paper is to integrate hardware and software. Control the hardware performance behavior with software. After functional verification, the hardware architecture provides high elasticity and general purpose.