A Novel Architecture Receiver for Band-pass Sampling and Reduction of Jitter Effects.
碩士 === 國立交通大學 === 電機工程學系 === 104 === In this thesis, we investigate the performance of a band-pass sampling OFDM receiver and propose a new low-cost approach to mitigate the effect of sampling uncertainty. Signal analysis and simulation results are provided for the proposed system. The observed meas...
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| Format: | Others |
| Language: | en_US |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/3pmw5z |
| Summary: | 碩士 === 國立交通大學 === 電機工程學系 === 104 === In this thesis, we investigate the performance of a band-pass sampling OFDM receiver and propose a new low-cost approach to mitigate the effect of sampling uncertainty. Signal analysis and simulation results are provided for the proposed system. The observed measurements show that the proposed system can reduce the effect of sampling uncertainty. Additionally, the proposed system has been
implemented in hardware. The ADC PCB board is for sampling RF signal, and the proposed algorithm is designed in a low-cost FPGA chip which uses a clock rate of 140MHz. We also design a software programme for measurement with LabVIEW. The software programme can not only show the result but also do mathematical operations for the posterior segment of proposed algorithm.
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