| Summary: | 碩士 === 國立交通大學 === 電信工程研究所 === 104 === As VLSI (Very Large Scale Integrated) techniques are getting more and more advanced, power grid verification becomes a challenging task. A well-designed power grid should guarantee correct circuit functionality at the intended design speed, by delivering well-regulated voltages at all power grid nodes. Moreover, power network needs to be verified early in the design process, and the adjustments can be easily incorporated. The focus of this work is to develop techniques for power grid verification in the context of vectorless constraints-based early stage verification, considering thermal effect on the IR drop in the power grid. We propose a novel approach to verify the power grid more accurate including temperature profiles on it. The experimental results also show that lake of accurate evaluation of thermal influence may underestimate the IR drop due to increased local temperature.
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