| Summary: | 碩士 === 國立成功大學 === 資訊工程學系 === 104 === Sorting is an important operation in a wide range of applications such as data mining, digital signal processing, pattern recognition or image processing. In many applications, only the max set value or the min set value need to be selected and researched, so it is very important to discuss how to find the max set value or the min set value in an efficient way. Moreover, a real-time sorting unit is indispensable for many applications.
In this thesis, an effective hardware architecture for sorting units is proposed. The architecture includes rank and threshold mechanisms and can easily be reused and pipelined due to its modular design and low power consumption. The combinational control unit was then implemented using a logic optimization method. Lastly, we propose an iterative architecture so the design can be used in different applications in an efficient way.
In general, for sorting methods in applications that process huge data strings or large amounts of data inputs, the electric circuits may require more signal transmissions, resulting in more dynamic power consumption. To solve this problem, the stored values were replaced with Rank and Threshold values with lower bit size, so that the stored values don’t need to be moved or sorted and the rank values are exchanged instead. Moreover, when iterative architectures are used, a threshold mechanism is implemented to exclude unnecessary repetitions and thus save power by reducing the number of signal transmissions and calculations inside the circuit. The experimental results indicate that the power consumption for our proposed method was successfully reduced at the mere expense of some area increase.
The VLSI architecture of the proposed design was implemented using Verilog HDL and synthesized by Synopsys Design Vision with the TSMC cell library. Finally, the total power consumption was measured by Synopsys Power Compiler, the synthesis results and total power consumption show that the proposed designs have the advantages of low cost and low power, respectively.
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