Design and Implementation of an Interleaved Power Factor Corrector

• Main Authors: Chao-Chi Tseng, 曾昭綺
• Other Authors: Yueh-Ru Yang
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/20353069876123987425

碩士 === 明志科技大學 === 機械工程系機械與機電工程碩士班 === 104 === A 1200W Power Factor Corrector (PFC) is designed and implemented in this thesis. The specification for this design is universal input range of 85V~265V with 390 V dc regulated output and operation frequency 170kHz. To meet high requirement of power factor and high efficiency, two phase interleaved boost converter is chosen as the topology. The PFC controller is UCC28070 from Texas Instruments. The PFC operates in continuous inductor current mode and average current control. The two power factor correction circuits were operated at 180 degree out of phase in interleaving way, which reduces input and output ripple current. Thus electrical stress in components is less and power density is increased. The controller parameters and control loop compensation are analyzed and conformed in this thesis. The crossover frequency of the current loop is set at 1/10 of the switching frequency. The zero is set at crossover frequency to obtain 45 degree phase margin. The pole frequency is set at 1/2 of switching frequency to reduce ripple and noise. The crossover frequency of the voltage loop is required to be set at frequency far below 120Hz. The zero is set at 1/10 of crossover frequency. The pole is set at crossover frequency to obtain 45 phase margin. The experiment results demonstrate that two phase interleaved power factor corrector can function power factor correction.