Design and Application of Iterative Learning Control from the Point of Performance Improvement and Memory Capacity

• Main Authors: YANG,CHIA-HUA, 楊家驊
• Other Authors: CHIEN,CHIANG-JU
• Format: Others
• Language: zh-TW
• Published: 2016
• Online Access: http://ndltd.ncl.edu.tw/handle/50727164790657632775

碩士 === 華梵大學 === 電子工程學系碩士班 === 104 === In this thesis, we discuss the design and analysis of the sampled-data iterative learning controller and present a feedforward-feedback iterative learning control structure which can extend the existing results in the literature. In addition to keep the advantages of learning performance and reduce the memory capacity, the learning control structure will also be more flexible. This thesis presents a more general feedforward-feedback iterative learning controller such that the feedback learning control structure can be a general dynamic controller but not limited to a PD controller. Furthermore, this thesis also studies the stability, robustness and convergence issues of the feedforward-feedback iterative learning controller from theoretical analysis point of view. We show that the learning error will converge to a small area even the initial error, input disturbance and output noise exist if a learning condition is satisfied. The size of the converged learning error will depend on the magnitude of the above uncertainties and forgetting factor. In addition to the theory analysis, we firstly use the Matlab program for simulation to verify the feasibility and correctness of the theory. Finally we realize the iterative learning controller into a digital circuit in FPGA chip for experiment of position tracking of DC motor. The experimental results show that the proposed feedforward-feedback iterative learning controller is feasible both form theory and practical application.