The High-speed PCB Layout Design on Multi-board Systems with A Case Study of VC709
碩士 === 健行科技大學 === 電機工程系碩士班 === 104 === The clock on PCB design is increased rapidly, thus design is more and more difficult. How to reduce the signal reflection, crosstalk, ringing on transmission line? These issues have been paid more and more attention. The operation speed on Data bus between CPU...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/gwce45 |