The development and applications of a MIPS softcore and its hardware abstraction layer
碩士 === 國立雲林科技大學 === 電子工程系 === 103 === Hardware abstraction layer is the communicate interface between hardware and software. An application can directly use the hardware with HAL API, it also provides a common access standard for driver development. The Nios II processor system from Altera uses HAL...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/35342940743787827577 |
| Summary: | 碩士 === 國立雲林科技大學 === 電子工程系 === 103 === Hardware abstraction layer is the communicate interface between hardware and software. An application can directly use the hardware with HAL API, it also provides a common access standard for driver development. The Nios II processor system from Altera uses HAL with the software tools of Quartus and Qsys to implement peripheral operations. This study uses the Tiger MIPS soft core from Cambridge University on FPGA platforms DE2 and DE0. IPs and drivers for peripherals such as NXT servo motors and light sensors are developed with HAL and a MIPS cross compiler SDE Lite so that several robotic applications can be developed using these peripherals. Performances of the MIPS soft core and Nios II are compared.
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