| Summary: | 碩士 === 大同大學 === 電機工程學系(所) === 103 === This thesis proposes a digital interleaved SEPIC power factor corrector based on microcontroller. First, the SEPIC topology is adopted as the main circuit to possess buck and boost function. Moreover, the microcontroller incorporated with interleaved switching to drive two parallel SEPIC to implement digital interleaved SEPIC power factor correction. In this thesis, we not only introduce the principle of SEPIC, analyze the operation mode of the proposed interleaved SEPIC, but also complete describe the design considerations of the system parameters. In addition, we also introduce how to design the peripheries of microcontroller, and details the program flow of the power factor correction. Finally, a 300W digital interleaved SEPIC power factor corrector is implemented to verify its feasibility by some experimental results.
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