The Integrated Circuit Design of A Power-Efficient Large-Dynamic-Range Sensing Amplifier and A Reconfigurable Low-Power High-Performance Low-Drop-Out Voltage Regulator for Biomedical Applications

碩士 === 國立臺灣科技大學 === 電機工程系 === 103 === Two reconfigurable power-efficient high-performance circuits, a low-noise amplifier and a linear voltage regulator, are proposed in this thesis, targeting sensing and monitoring devices for biomedical applications and for internet of things (IoT). Floating-gate...

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Bibliographic Details
Main Authors: Li-Han Liu, 劉立涵
Other Authors: Sheng-Yu Peng
Format: Others
Language:en_US
Published: 2015
Online Access:http://ndltd.ncl.edu.tw/handle/76074483963860628685
Description
Summary:碩士 === 國立臺灣科技大學 === 電機工程系 === 103 === Two reconfigurable power-efficient high-performance circuits, a low-noise amplifier and a linear voltage regulator, are proposed in this thesis, targeting sensing and monitoring devices for biomedical applications and for internet of things (IoT). Floating-gate transistors are employed to enable reconfigurability and to achieve low power consumption. In the proposed low-noise amplifier, a floating-gate based pseudo resistor is proposed to substantially improve circuit linearity as well as dynamic range at low frequencies. The pseudo resistor is made of a floating-gate transistor, of which gate voltage is kept the mean value of the drain and the source voltages. In this manner, the achieved dynamic range is more than 62.8 dB with total harmonic distortion better than 60 dB across the whole bandwidth. Using a supply voltage of 2.5 V, an amplifier consumes 3.6 uA of current to achieve a bandwidth of 10 kHz with a dynamic range of 63.7 dB. From measurements, the noise efficiency factors corresponding to the bandwidth settings of 100Hz, 1 kHz, and 10 kHz are 1.88, 1.93, and 2.05, respectively. A reconfigurable low-power high-performance output-capacitor-less low-drop-out (LDO) voltage regulator is also proposed in this thesis. This LDO consists of a floatinggate nMOS pass transistor, an adaptively biased error amplifier with a class-AB input stage, and capacitive circuits for voltage reference generation and output feedback sensing. Consequently, the LDO can achieve a low drop-out voltage of one VDSsat, high power supply rejection, fast transient responses with low quiescent current, and programmable output voltage and rejection bandwidth. From the measurements, with the quiescent current level below 1 uA, the maximum load current is 2.5 mA with a drop-out-voltage of 200 mV. The pogrammable output range is 1.8 V to 2.5 V with power supply rejection of -75 dB. The current efficiency is higher than 99:96%. The maximum output load capacitance can be as large as 50 nF under the condition of 200 A load current. Without using a bandgap reference circuit, the measured output voltage temperature coefficient is 100ppm/◦C.