Hardware/Software Co-design and Implementation of a Temporal-Median-Filter-based Algorithmic Processing System for Background Subtraction

Hardware/Software Co-design and Implementation of a Temporal-Median-Filter-based Algorithmic Processing System for Background Subtraction

碩士 === 國立臺灣科技大學 === 電子工程系 === 103 === This thesis is relevant to the hardware/software co-design and implementation of a temporal-median-filter-based algorithmic processing system for background subtraction. The research work consists of the following four parts. The first part is related to the so...

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Bibliographic Details
Main Authors:	Hong-Min Hu, 胡閎閔
Other Authors:	Chen-Mie Wu
Format:	Others
Language:	zh-TW
Published:	2015
Online Access:	http://ndltd.ncl.edu.tw/handle/26408138785003942689

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