Development of 5.8 GHz Active CMOS Doubly-Balanced Mixers

• Main Authors: Shih-Hsin Chang, 張仕欣
• Other Authors: Chao-Hsiung Tseng
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/78460573756014780811

碩士 === 國立臺灣科技大學 === 電子工程系 === 103 === This thesis presents three active mixers, namely doubly-balanced mixer, mixer with embedded VCO, and low-power gate-driven mixer, for the non-contact vital-sign radar sensor applications. All the developed mixers are fabricated in the TSMC 0.18 μm CMOS process. The load stage of the doubly-balanced mixer employs the common-mode feedback architecture to enhance the linearity of the mixer. In addition, the matching network is designed by the RLC lumped elements. The doubly balanced mixer is then integrated with an embedded VCO in a chip. The voltage-controlled oscillator adopts the LC complementary transistor architecture to achieve a better phase-noise performance. The LC lowpass filter is designed and connected with the output of mixer to suppresses the high frequency harmonics. By designating the gate bias in the subthreshold conduction region, the low-power gate-driven mixer can be implemented by considering the trade off of the DC power consumption and transconductance. Moreover, the baluns are also integrated in the chip.