Improvement of Power Integrity by Pseudo-Balanced Signaling

• Main Authors: I-Sung Chiu, 丘逸嵩
• Other Authors: Ruey-Beei Wu
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/71874759963745744728

碩士 === 國立臺灣大學 === 電信工程學研究所 === 103 === Signal and power integrity are crucial for ensuring good performance in high speed digital systems. As the operating frequency of digital systems increases, the power and ground bounce created by simultaneous switching noise (SSN) becomes a limiting factor for the performance of these devices. SSN is caused by parasitic inductance that exists in the power delivery network (PDN), and voltage fluctuations on the power and ground rails can lead to reduced noise margins and can limit the maximum frequency of a digital device. Pseudo-balanced power transmission line (PB-PTL) concept has been shown to reduce simultaneous switching noise and improve performance. This balanced signaling scheme minimizes the variation of the total driving current through the PDN by controlling the number of high and low states in the output data string. As the total driving current is maintained constant, the variation of the current can be minimized, and therefore SSN can be reduced. In this paper, the optimal pseudo-balanced scheme has been proposed for reducing the overhead. Numerical simulation results of power-plane-based and power-transmission-line-based microstrip PCB have demonstrated the validity of this optimal pseudo-balanced scheme for SSN reduction, resulting in better eye height and signal quality. Next, the pseudo-balanced scheme is employed to industrial double-data-rate three synchronous dynamic random access memory (DDR3 SDRAM), which used one controller to control two DDR in a two-layer PCB with signal/power/ground coexisting in both layers. Simulation has shown that the pseudo-balanced scheme can reduce simultaneous switching noise to achieve better signal quality. Moreover, this thesis also proposes the optimal placement of decoupling capacitors on two-layer power trace structures to broaden usable bandwidth.