Design and Implementation of a Distributed Video Encoder

• Main Authors: Sheng-Hsiang Chang, 張勝翔
• Other Authors: Sao-Jie Chen
• Format: Others
• Language: en_US
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/49750384337003112085

碩士 === 國立臺灣大學 === 電子工程學研究所 === 103 === Distributed Video Coding (DVC) is a novel scheme which is different from the state-of-the-art video compression standards. The characteristic of DVC is that there is a low computational complexity encoder. However, there are two issues on the DVC. The first issue is that DVC encoder cannot perform real-time encoding at suitable situations. In order to solve this issue, a hardware architecture of the DVC encoder with a high resource-sharing is proposed in this work to support the real-time encoding of 1080p (1920 1080) video at 30 frames per second. Besides, this hardware architecture also supports the H.264/AVC intra-frame encoding. The other issue is that imbalance coding time exists between the encoder and the decoder. Low-complexity motion estimation algorithm and skip mode have been applied to the encoder of DVC to reduce half of the decoding time. Besides, the rate-distortion performance is improved in high motion videos.