Algorithm and Hardware Architecture of Just-Noticed Difference Based Perception Engine for Video Encoders

碩士 === 國立臺灣大學 === 電子工程學研究所 === 103 === The existing multimedia has been affecting the life of human beings nowadays. Due to the limitation of computation complexity and transmission bandwidth, the data processing of the high quality video needs improvement. The newest video compression standard, HEV...

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Bibliographic Details
Main Authors: Wen-Wei Chao, 趙文維
Other Authors: Shao-Yi Chien
Format: Others
Language:en_US
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/51681032877209066210
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Summary:碩士 === 國立臺灣大學 === 電子工程學研究所 === 103 === The existing multimedia has been affecting the life of human beings nowadays. Due to the limitation of computation complexity and transmission bandwidth, the data processing of the high quality video needs improvement. The newest video compression standard, HEVC, offers tens of to hundreds of compression ratio. The final receiver of the video information is human eyes. However, the traditional standard only uses Peak Signal-to-Noise-Ratio (PSNR) as the quality index for compressed video bit stream. PSNR index does not consider the properties in human visual system (HVS). The bit allocation of the video bit stream is usually not opti-mized for the perception of human eyes. How to allocate the bit rate for different content of the video effectively within a limited bandwidth is important. With proper allocation of bits, such as more bits for important area in one frame and fewer bits for indifferent area, the bit rate can be reduced. In other words, the compressed video shows better perceptual quality compared with the original standard’s com-pressed video in the same bit rate. The key point in bit allocation is considering the human eye perception in HVS. Many research efforts have been dedicated to modeling the human visual system’s characteristics. The resulting models have been integrated into video coding frameworks in different ways. Among them, coding enhancements with the just Noticed distortion (JND) model have drawn much at-tention in recent years due to its significant gains. But the conventional HVS per-ception engine on video coding only adopt different HVS technique by some fusion algorithm, which ignore the mutual effect between them. In this work, we will discuss the relation among them and proposed a new Just-Noticed Distortion Model for video codec. For satisfying the real time requirements in video encoding systems, we proposed a low hardware complexity human visual system perception evaluation algorithm, which can improve the functionality of bit allocation of video encoders, while the hardware overhead is negligible. The main target of this thesis is to discuss relation among the related technique, and further proposed a new JND model for video codec. One perception evaluation engine must analyze the content of current video frame data and determine the bit allocation for these data. We proposed an improved Just-Noticed Distortion (JND) models, which consider the visual attention model, sensitivity models and the dis-tortion of quantization simultaneously to get the weighting of importance of human eye perception for each coding unit (CU) in video frame. Cooperating with HEVC video encoding system, we further developed the algorithm and system architecture which is suitable for hardware implementation to analyze the video content and then proposed a scheme to determine the quantization parameter in the encoding system. To save the system bandwidth, we employed the CU-based processing as our basic unit of processing flow, and parallel processing for the each hardware of the visual model. To ensure the compatibility of our perception model, we adopt [1] as our basic platform. The proposed algorithm achieves better bit allocation for video coding systems by changing quantization parameters at CU level. With simulations of the coopera-tion of our proposed evaluation engine and the HEVC encoder in HM11.0 and subjective experiments, results show that our algorithm achieves about 14% bit-rate saving in the QP range of 27-37 without perceptual (visual) quality degradation. For the hardware implementation of the proposed evaluation engine, the engine is designed using TSMC40nm technology. The core size is about 0.1mm2, and the power con-sumption is 7.39mW, which is compatible with [1] and the hardware overhead of proposed engine is about 1%.